Re: BUG #15844: MIPS: remove .set mips2 in s_lock.h to fix r6 build

Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> 于2019年6月23日周日 上午6:37写道：
>
> I wrote:
> > So the gcc guys aren't any more wedded than we are to the rule that
> > one must not generate LL/SC on MIPS-I. They're probably assuming the
> > same thing we are, which is that if you're actually doing this on
> > MIPS-I then you'll get an instruction trap and the kernel will
> > emulate it for you.
>
> Actually, after further contemplating that argument (which I was reminded
> of by excavating in our commit log), I realize that having a .set mips2
> in the ASM is actually the right way to do this, because that only results
> in LL/SC getting emulated when we need them to be. Forcing -march=mips2
> across the entire Postgres build would exceed our authority really ---
> yeah, it might produce better code quality, but it's not our business to
> override platform-level target architecture decisions.

you are correct, that we should follow the target architecture
decisions of OS vendor,
if possible.

>
> So I now think your original proposal was about the best way to do this,
> though I'd tweak it to make the test be "#if __mips_isa_rev < 2", as

here we should use #if __mips < 2 instead of __mips_isa_rev .
The history of MIPS revisions:

MIPS I : __mips=1 __mips_isa_rev = undef
MIPS II : __mips=2 __mips_isa_rev = undef
MIPS III : __mips=3 __mips_isa_rev = undef
MIPS IV : __mips=4 __mips_isa_rev = undef
MIPS 32/64(r1) : __mips=32/64 __mips_isa_rev = 1
MIPS 32/64 r2 : __mips=32/64 __mips_isa_rev = 2
MIPS 32/64 r3 : __mips=32/64 __mips_isa_rev = 3
MIPS 32/64 r5 : __mips=32/64 __mips_isa_rev = 5
MIPS 32/64 r6 : __mips=32/64 __mips_isa_rev = 6

> attached. It doesn't seem like forcing the ISA level down is ever
> something we want to do, even if we know there's no practical difference.
>
> regards, tom lane
>

--
YunQiang Su