Re: [PATCH] Reduce LWLockWaitListLock() cache-line contention with adaptive spin reads

Hi

> Summary:
> > - Low client counts (<= core count): no measurable impact. Throughput is
> > unchanged within noise (1.01x-1.06x at 8-64 clients), so lightly
> loaded
> > systems are unaffected.
> > - High client counts (>= 120 clients): significant improvement. The
> patch
> > delivers 1.11x-1.59x at 120-1000 clients.
>
> Thanks for working on this. The general approach looks reasonable and is
> not specific to Intel CPUs. Reducing repeated reads of a contended cache
> line lowers cache-coherency traffic and cache-line bouncing, so
> high-core-count AMD and ARM systems should benefit as well. The adaptive
> interval should also keep the impact small under low contention.
>
> Please consider adding benchmark results from at least one non-Intel
> platform. It would also be helpful to explain the choice of the threshold,
> increment, and maximum interval. The MIN_DELAY_USEC change affects
> spinlock behavior globally, so its relationship to this optimization should
> be justified or evaluated in a separate patch.
>

Thanks