Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture

From: Nathan Bossart <nathandbossart(at)gmail(dot)com>
To: Salvatore Dipietro <dipietro(dot)salvatore(at)gmail(dot)com>
Cc: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Robert Haas <robertmhaas(at)gmail(dot)com>, pgsql-hackers(at)postgresql(dot)org, Salvatore Dipietro <dipiets(at)amazon(dot)com>, blakgeof(at)amazon(dot)com
Subject: Re: Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture
Date: 2025-05-19 22:07:21
Message-ID: aCurmWfKUjQl6ozO@nathan
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On Mon, May 19, 2025 at 11:38:39AM -0500, Nathan Bossart wrote:
> On Tue, May 13, 2025 at 11:37:45AM -0700, Salvatore Dipietro wrote:
>> Based on your findings Nathan, what is the best way to proceed for this change?
>> Do we need more validation for it? If yes, which kind?
>
> Well, I am confused because your recent message [0] indicated that you saw
> improvement without the non-locking initial test in TAS_SPIN, which seems
> to contradict my findings [1]. Could you retry your tests on v18devel? It
> might also be useful to repeat the tests on a variety of hardware to ensure
> it's a win across the board.

I should probably also mention that we are in feature-freeze until v19
development opens in July.

--
nathan

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