[PATCH v1] Optimize 64-bit atomic access on RV64

RV64 guarantees that naturally aligned XLEN-wide loads and stores are atomic. Define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY for RV64 so the generic 64-bit atomic implementation can use plain loads and stores instead of compare/exchange loops. Keep RV32 on the existing generic fallback.

Co-authored-by: Ni Jincheng <nijincheng(at)iscas(dot)ac(dot)cn>
Co-authored-by: Yuansheng <yuansheng(at)isrc(dot)iscas(dot)ac(dot)cn>
---
src/include/port/atomics.h | 2 ++
src/include/port/atomics/arch-riscv.h | 26 ++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
create mode 100644 src/include/port/atomics/arch-riscv.h

diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index a605ea81d07..985f4e2416f 100644
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -69,6 +69,8 @@
#include "port/atomics/arch-x86.h"
#elif defined(__powerpc__) || defined(__powerpc64__)
#include "port/atomics/arch-ppc.h"
+#elif defined(__riscv)
+#include "port/atomics/arch-riscv.h"
#endif

/*
diff --git a/src/include/port/atomics/arch-riscv.h b/src/include/port/atomics/arch-riscv.h
new file mode 100644
index 00000000000..761a9811cff
--- /dev/null
+++ b/src/include/port/atomics/arch-riscv.h
@@ -0,0 +1,26 @@
+/*-------------------------------------------------------------------------
+ *
+ * arch-riscv.h
+ * Atomic operations considerations specific to RISC-V
+ *
+ * Portions Copyright (c) 1996-2026, PostgreSQL Global Development Group
+ *
+ * src/include/port/atomics/arch-riscv.h
+ *
+ *-------------------------------------------------------------------------
+ */
+
+/* intentionally no include guards, should only be included by atomics.h */
+#ifndef INSIDE_ATOMICS_H
+#error "should be included via atomics.h"
+#endif
+
+/*
+ * The RV64 base ISA guarantees naturally aligned XLEN-bit loads and stores
+ * are atomic. PostgreSQL's pg_atomic_uint64 objects are naturally aligned,
+ * so the generic implementation may use a single plain load/store rather
+ * than a compare/exchange loop. RV32 retains the generic fallback.
+ */
+#if __riscv_xlen == 64
+#define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY
+#endif
--
2.43.0