| From: | Andres Freund <andres(at)anarazel(dot)de> |
|---|---|
| To: | Andrew Dunstan <andrew(at)dunslane(dot)net> |
| Cc: | Dave Cramer <davecramer(at)postgres(dot)rocks>, Michael Paquier <michael(at)paquier(dot)xyz>, Anthony Roberts <anthony(dot)roberts(at)linaro(dot)org>, Daniel Gustafsson <daniel(at)yesql(dot)se>, Lina Iyer <lina(dot)iyer(at)linaro(dot)org>, Mike Holmes <mike(dot)holmes(at)linaro(dot)org>, Peter Eisentraut <peter(at)eisentraut(dot)org>, PostgreSQL Hackers <pgsql-hackers(at)lists(dot)postgresql(dot)org>, Thomas Munro <thomas(dot)munro(at)gmail(dot)com>, Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> |
| Subject: | Re: [PATCH] Add native windows on arm64 support |
| Date: | 2024-02-12 21:19:15 |
| Message-ID: | 20240212211915.5lnmooumzoeyedoq@awork3.anarazel.de |
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| Lists: | pgsql-hackers |
Hi,
On 2024-02-12 12:50:12 -0800, Andres Freund wrote:
> On 2024-02-12 13:28:40 -0500, Andrew Dunstan wrote:
> I wonder if this indicates that we are either missing memory barriers
> somewhere or that the memory barriers we end up with on msvc + arm aren't
> correct? Either could explain why the problem doesn't occur when building
> with optimizations.
I think I might have been on to something - if my human emulation of a
preprocessor isn't wrong, we'd end up with
#define S_UNLOCK(lock) \
do { _ReadWriteBarrier(); (*(lock)) = 0; } while (0)
on msvc + arm. And that's entirely insufficient - _ReadWriteBarrier() just
limits *compiler* level reordering, not CPU level reordering. I think it's
even insufficient on x86[-64], but it's definitely insufficient on arm.
Another issue I see is that we have a bunch of code that's dependant on
__aarch64__ being set - but it doesn't look to me that it is set on msvc. One
obvious consequence of that is that 64bit atomics won't be used (see
src/include/port/atomics/arch-arm.h) - but that shouldn't cause this issue.
Greetings,
Andres Freund
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