Re: Misaligned BufferDescriptors causing major performance problems on AMD

From: Andres Freund <andres(at)2ndquadrant(dot)com>
To: Bruce Momjian <bruce(at)momjian(dot)us>
Cc: Robert Haas <robertmhaas(at)gmail(dot)com>, Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Greg Stark <stark(at)mit(dot)edu>, Peter Geoghegan <pg(at)heroku(dot)com>, PostgreSQL-development <pgsql-hackers(at)postgresql(dot)org>
Subject: Re: Misaligned BufferDescriptors causing major performance problems on AMD
Date: 2014-12-24 09:30:19
Message-ID: 20141224093019.GI23613@alap3.anarazel.de
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On 2014-12-23 22:51:22 -0500, Bruce Momjian wrote:
> Many of these are 64-byte aligned, including Buffer Descriptors.

In that case you need to change max_connections, some settings will lead
to unaligned BufferDescriptors.

> I
> tested pgbench with these commands:
>
> $ pgbench -i -s 95 pgbench
> $ pgbench -S -c 95 -j 95 -t 100000 pgbench
>
> on a 16-core Xeon server and got 84k tps. I then applied another patch,
> attached, which causes all the structures to be non-64-byte aligned, but
> got the same tps number.

'Xeon' itself doesn't say much. It's been applied to widly different
CPUs over the years. I guess that was a single socket server? You're
much more likely to see significant problems on a multi node NUMA
servers where the penalties for cache misses/false sharing are a
magnitude or three higher.

> Can someone test these patches on an AMD CPU and see if you see a
> difference? Thanks.

I don't think you'll see a bigger difference there.

Greetings,

Andres Freund

--
Andres Freund http://www.2ndQuadrant.com/
PostgreSQL Development, 24x7 Support, Training & Services

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