Re: Warm-cache prefetching

From: Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us>
To: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
Cc: Kenneth Marshall <ktm(at)is(dot)rice(dot)edu>, Simon Riggs <simon(at)2ndquadrant(dot)com>, Qingqing Zhou <zhouqq(at)cs(dot)toronto(dot)edu>, pgsql-hackers(at)postgresql(dot)org
Subject: Re: Warm-cache prefetching
Date: 2005-12-09 16:32:48
Message-ID: 200512091632.jB9GWmv04259@candle.pha.pa.us
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Tom Lane wrote:
> Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us> writes:
> > I can see that being useful for a single-user application that doesn't
> > have locking or I/O bottlenecks, and doesn't have a multi-stage design
> > like a database. Do we do enough of such processing that we will _see_
> > an improvement, or will our code become more complex and it will be
> > harder to make algorithmic optimizations to our code?
>
> The main concern I've got about this is the probable negative effect on
> code readability. There's a limit to the extent to which I'm willing to
> uglify the code for processor-specific optimizations, and that limit is
> not real far off. There are a lot of other design levels we can work at
> to obtain speedups that won't depend on the assumption we are running
> on this-year's Intel hardware.

That is my guess too. We have seen speedups by inlining and optimizing
frequently-called functions and using assembler for spinlocks. Proof of
the assembler is in /pg/include/storage/s_lock.h and proof of the
inlining is in /pg/include/access/heapam.h. Those were chosen for
optimization because they were used a lot.

I think the big question is whether there are other areas that have a
similar CPU load and can be meaningfully optimized, and does the
optimization include such things as multi-staging. I think we should
take a wait and see attitude and see what test results people get.

--
Bruce Momjian | http://candle.pha.pa.us
pgman(at)candle(dot)pha(dot)pa(dot)us | (610) 359-1001
+ If your life is a hard drive, | 13 Roberts Road
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