Re: Optimize Arm64 crc32c implementation in Postgresql

From: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
To: Heikki Linnakangas <hlinnaka(at)iki(dot)fi>
Cc: Andres Freund <andres(at)anarazel(dot)de>, Thomas Munro <thomas(dot)munro(at)enterprisedb(dot)com>, Yuqi Gu <Yuqi(dot)Gu(at)arm(dot)com>, "pgsql-hackers(at)postgresql(dot)org" <pgsql-hackers(at)postgresql(dot)org>
Subject: Re: Optimize Arm64 crc32c implementation in Postgresql
Date: 2018-04-03 17:47:18
Message-ID: 10924.1522777638@sss.pgh.pa.us
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Heikki Linnakangas <hlinnaka(at)iki(dot)fi> writes:
> I was just about to commit this, when I started to wonder: Do we need to
> worry about alignment? As the patch stands, it will merrily do unaligned
> 8-byte loads. Is that OK on ARM? It seems to work on the system I've
> been testing on, but I don't know. And even if it's OK, would it perform
> better if we did 1-byte loads in the beginning, until we reach the
> 8-byte boundary?

I'm pretty sure that some ARM platforms emulate unaligned access through
kernel trap handlers, which would certainly make this a lot slower than
handling the unaligned bytes manually. Maybe that doesn't apply to any
ARM CPU that has this instruction ... but as you said, it'd be better
to consider the presence of the instruction as orthogonal to other
CPU features.

regards, tom lane

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