Re: [PATCHES] ecpg sqlca.h bug

From: Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us>
To: Rene Hogendoorn <hogend(at)nlr(dot)nl>
Cc: pgsql-patches(at)postgreSQL(dot)org, pgsql-bugs(at)postgreSQL(dot)org
Subject: Re: [PATCHES] ecpg sqlca.h bug
Date: 1999-11-23 19:27:31
Message-ID: 199911231927.OAA10251@candle.pha.pa.us
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Applied to current source tree only. This will appear in 7.0.

> ============================================================================
> POSTGRESQL BUG REPORT
> ============================================================================
>
>
> Your name : Rene Hogendoorn
> Your email address : hogend(at)nlr(dot)nl
>
>
> System Configuration
> ---------------------
> Architecture (example: Intel Pentium) : Dec alpha
>
> Operating System (example: Linux 2.0.26 ELF) : DUNIX 4.0f
>
> PostgreSQL version (example: PostgreSQL-6.5.3): PostgreSQL-6.5.3
>
> Compiler used (example: gcc 2.8.0) : gcc 2.7.2.2
>
>
> Please enter a FULL description of your problem:
> ------------------------------------------------
>
> Compiling postgresql-6.5.3 on a Dec alpha DUNIX 4.0f with gcc fails
> due to postgresql-6.5.3/src/include/storage/s_lock.h.
> Basically, the '#if defined(__GNUC__)' assumes that glibc is used,
> which is plain wrong on OSF. Patch below.
>
>
> Please describe a way to repeat the problem. Please try to provide a
> concise reproducible example, if at all possible:
> ----------------------------------------------------------------------
>
>
>
>
>
> If you know how this problem might be fixed, list the solution below:
> ---------------------------------------------------------------------
>
> diff -c postgresql-6.5.3/src/include/storage/s_lock.h.orig postgresql-6.5.3/src/include/storage/s_lock.h
> *** postgresql-6.5.3/src/include/storage/s_lock.h.orig Tue Nov 23 16:19:42 1999
> --- postgresql-6.5.3/src/include/storage/s_lock.h Tue Nov 23 16:15:47 1999
> ***************
> *** 78,113 ****
> * All the gcc inlines
> */
>
> - #if defined(__alpha__)
> - #define TAS(lock) tas(lock)
> - #define S_UNLOCK(lock) { __asm__("mb"); *(lock) = 0; }
> -
> - static __inline__ int
> - tas(volatile slock_t *lock)
> - {
> - register slock_t _res;
> -
> - __asm__(" ldq $0, %0 \n\
> - bne $0, 3f \n\
> - ldq_l $0, %0 \n\
> - bne $0, 3f \n\
> - or $31, 1, $0 \n\
> - stq_c $0, %0 \n\
> - beq $0, 2f \n\
> - bis $31, $31, %1 \n\
> - mb \n\
> - jmp $31, 4f \n\
> - 2: or $31, 1, $0 \n\
> - 3: bis $0, $0, %1 \n\
> - 4: nop ": "=m"(*lock), "=r"(_res): :"0");
> -
> - return (int) _res;
> - }
> -
> - #endif /* __alpha__ */
> -
> -
> -
> #if defined(__i386__)
> #define TAS(lock) tas(lock)
>
> --- 78,83 ----
> ***************
> *** 226,246 ****
> * All non gcc
> */
>
> - #if defined(__alpha__)
> - /*
> - * OSF/1 (Alpha AXP)
> - *
> - * Note that slock_t on the Alpha AXP is msemaphore instead of char
> - * (see storage/ipc.h).
> - */
> - #define TAS(lock) (msem_lock((lock), MSEM_IF_NOWAIT) < 0)
> - #define S_UNLOCK(lock) msem_unlock((lock), 0)
> - #define S_INIT_LOCK(lock) msem_init((lock), MSEM_UNLOCKED)
> - #define S_LOCK_FREE(lock) (!(lock)->msem_state)
> - #endif /* __alpha__ */
> -
> -
> -
> #if defined(NEED_I386_TAS_ASM)
> /* non gcc i386 based things */
>
> --- 196,201 ----
> ***************
> *** 271,276 ****
> --- 226,277 ----
> /*************************************************************************
> * These are the platforms that have common code for gcc and non-gcc
> */
> +
> + #if defined(__alpha)
> +
> + #if defined(__osf__)
> + /*
> + * OSF/1 (Alpha AXP)
> + *
> + * Note that slock_t on the Alpha AXP is msemaphore instead of char
> + * (see storage/ipc.h).
> + */
> + #define TAS(lock) (msem_lock((lock), MSEM_IF_NOWAIT) < 0)
> + #define S_UNLOCK(lock) msem_unlock((lock), 0)
> + #define S_INIT_LOCK(lock) msem_init((lock), MSEM_UNLOCKED)
> + #define S_LOCK_FREE(lock) (!(lock)->msem_state)
> +
> + #else /* i.e. not __osf__ */
> +
> + #define TAS(lock) tas(lock)
> + #define S_UNLOCK(lock) { __asm__("mb"); *(lock) = 0; }
> +
> + static __inline__ int
> + tas(volatile slock_t *lock)
> + {
> + register slock_t _res;
> +
> + __asm__(" ldq $0, %0 \n\
> + bne $0, 3f \n\
> + ldq_l $0, %0 \n\
> + bne $0, 3f \n\
> + or $31, 1, $0 \n\
> + stq_c $0, %0 \n\
> + beq $0, 2f \n\
> + bis $31, $31, %1 \n\
> + mb \n\
> + jmp $31, 4f \n\
> + 2: or $31, 1, $0 \n\
> + 3: bis $0, $0, %1 \n\
> + 4: nop ": "=m"(*lock), "=r"(_res): :"0");
> +
> + return (int) _res;
> + }
> + #endif /* __osf__ */
> +
> + #endif /* __alpha */
> +
> +
>
> #if defined(__hpux)
> /*
>
> --
>
> R. A. Hogendoorn E-mail: hogend(at)nlr(dot)nl
> Information and Communication Technology Division Tel. +31-527-24-8367
> National Aerospace Laboratory, The Netherlands Fax. +31-527-24-8210
>
> ************
>
>

--
Bruce Momjian | http://www.op.net/~candle
maillist(at)candle(dot)pha(dot)pa(dot)us | (610) 853-3000
+ If your life is a hard drive, | 830 Blythe Avenue
+ Christ can be your backup. | Drexel Hill, Pennsylvania 19026

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