Re: spinlocks on HP-UX

On 29.12.2011 04:36, Manabu Ori wrote:
> I believe lwarx hint would be no harm for recent PowerPC processors.
> What I tested are:
>
> (1) Built postgres on POWER6 + RHEL5, which got lwarx hint
> included. Then copy these src tree to POWER5 + RHEL4 and
> run "make test", finished successfully.
>
> (2) Lwarx test in configure failed on POWER5 + RHEL4.
>
> Note that POWER6 understands lwarx hint and POWER5 doesn't.
> RHEL5 binutils supports lwarx hint and RHEL4 binutils doesn't.
>
> The only concern is for very old PowerPC.
> Referring to Power Instruction Set Architecture manual(*1), on
> some processors that precede PowerISA v2.00, executing lwarx with
> hint will cause the illegal instruction error.
>
> Lwarx test in configure should fail on these kind of processors,
> guessing from my test(2).

The Linux kernel does this (arch/powerpc/include/asm/ppc-opcode.h):

> 127 /*
> 128 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
> 129 * larx with EH set as an illegal instruction.
> 130 */
> 131 #ifdef CONFIG_PPC64
> 132 #define __PPC_EH(eh) (((eh) & 0x1) << 0)
> 133 #else
> 134 #define __PPC_EH(eh) 0
> 135 #endif

We can't copy-paste code from Linux directly, and I'm not sure I like
that particular phrasing of the macro, but perhaps we should steal the
idea and only use the hint on 64-bit PowerPC processors? I presume all
the processors that support the hint are 64-bit, so the question is, is
there any 64-bit PowerPC processors that would get upset about it? It's
quite arbitrary to tie it to the word length, but if it works as a
dividing line in practice, I'm fine with it.

--
Heikki Linnakangas
EnterpriseDB http://www.enterprisedb.com