Re: Latches with weak memory ordering (Re: max_wal_senders must die)

From: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
To: Robert Haas <robertmhaas(at)gmail(dot)com>
Cc: Aidan Van Dyk <aidan(at)highrise(dot)ca>, Andres Freund <andres(at)anarazel(dot)de>, pgsql-hackers(at)postgresql(dot)org, Heikki Linnakangas <heikki(dot)linnakangas(at)enterprisedb(dot)com>, Bruce Momjian <bruce(at)momjian(dot)us>, Josh Berkus <josh(at)agliodbs(dot)com>
Subject: Re: Latches with weak memory ordering (Re: max_wal_senders must die)
Date: 2010-11-19 15:44:30
Message-ID: 29927.1290181470@sss.pgh.pa.us
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Robert Haas <robertmhaas(at)gmail(dot)com> writes:
> I completely agree, but I'm not too sure I want to drop support for
> any platform for which we haven't yet implemented such primitives.
> What's different about this case is that "fall back to taking the spin
> lock" is not a workable option.

The point I was trying to make is that the fallback position can
reasonably be a no-op.

> That's good to hear. I'm more worried, however, about architectures
> where we supposedly have TAS but it isn't really TAS but some
> OS-provided "acquire a lock" primitive. That won't generalize nicely
> to what we need for this case.

I did say we need some research ;-). We need to look into what's the
appropriate primitive for any such OSes that are available for PPC or
MIPS. I don't feel a need to be paranoid about it for other
architectures.

regards, tom lane

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