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Re: Re: [PATCH] Use CC atomic builtins if available [was:Re: TAS patch for building on armel/armhf thumb]

From: Noah Misch <noah(at)leadboat(dot)com>
To: Heikki Linnakangas <heikki(dot)linnakangas(at)enterprisedb(dot)com>
Cc: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Robert Haas <robertmhaas(at)gmail(dot)com>,PostgreSQL Bugs <pgsql-bugs(at)postgresql(dot)org>
Subject: Re: Re: [PATCH] Use CC atomic builtins if available [was:Re: TAS patch for building on armel/armhf thumb]
Date: 2011-12-19 21:53:41
Message-ID: 20111219215341.GD9495@tornado.leadboat.com (view raw or flat)
Thread:
Lists: pgsql-bugs
On Mon, Dec 19, 2011 at 11:25:06PM +0200, Heikki Linnakangas wrote:
> I compiled the attached test program on an HP Itanium box, using the  
> same flags you get from PostgreSQL's configure on that box. The relevant  
> assembler output is:
>
>         xchg4           r14 = [r15], r14           // M [slocktest.c: 66/3]
> //file/line/col slocktest.c/67/3
>         ld1.acq         r16 = [r11]                // M [slocktest.c: 67/3]
>         nop.i           0                          // I
> //file/line/col slocktest.c/68/3
>         st1.rel         [r11] = r10             ;; // M [slocktest.c: 68/3]
> //file/line/col slocktest.c/69/3
>         st4.rel         [r15] = r0                 // M [slocktest.c: 69/3]
> //file/line/col slocktest.c/70/1
>
>
> The trick I missed is that the compiler attaches .rel to all the stores  
> and .acq to all the loads through a volatile pointer. gcc seems to do  
> the same. So we're safe.

The Intel compiler appears not to follow this convention:
http://software.intel.com/sites/products/documentation/hpc/compilerpro/en-us/cpp/lin/compiler_c/copts/ccpp_options/option_qserialize-volatile.htm

If you have that compiler installed, could you see which opcode it generates?

Thanks,
nm

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Subject: R: R: BUG #6342: libpq blocks forever in "poll" function
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Subject: Re: Re: [PATCH] Use CC atomic builtins if available [was: Re: TAS patch for building on armel/armhf thumb]

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