Skip site navigation (1) Skip section navigation (2)

Intel Itanium, TLB

From: Bruce Momjian <pgman(at)candle(dot)pha(dot)pa(dot)us>
To: PostgreSQL-development <pgsql-hackers(at)postgreSQL(dot)org>
Subject: Intel Itanium, TLB
Date: 2002-09-30 00:26:10
Message-ID: 200209300026.g8U0QBw09486@candle.pha.pa.us (view raw or flat)
Thread:
Lists: pgsql-hackers
I read a good article about the problem Intel is having with the 64-bit
Itanium.  I think there are some good leasons in the article:

	http://www.nytimes.com/2002/09/29/technology/circuits/29CHIP.html

There is also a Slashdot discussion about the article:

	http://slashdot.org/article.pl?sid=02/09/29/1752204&mode=nested&tid=118

Also, here is an article describing the x86 4MB page sizes used by the
Linux TLB code:

	http://www.rcollins.org/ddj/May96/May96.html

x86 usually uses two levels of directory/page tables, while the 4MB
version uses only the page directory.

-- 
  Bruce Momjian                        |  http://candle.pha.pa.us
  pgman(at)candle(dot)pha(dot)pa(dot)us               |  (610) 359-1001
  +  If your life is a hard drive,     |  13 Roberts Road
  +  Christ can be your backup.        |  Newtown Square, Pennsylvania 19073

pgsql-hackers by date

Next:From: Marc G. FournierDate: 2002-09-30 02:39:39
Subject: Re: CVS split problems
Previous:From: Mike SostericDate: 2002-09-30 00:12:55
Subject: Re: [SQL] arrays

Privacy Policy | About PostgreSQL
Copyright © 1996-2014 The PostgreSQL Global Development Group