Index: s_lock.h
===================================================================
RCS file: /home/projects/pgsql/cvsroot/pgsql/src/include/storage/s_lock.h,v
retrieving revision 1.75
diff -c -p -3 -r1.75 s_lock.h
*** s_lock.h	2000/12/03 14:41:42	1.75
--- s_lock.h	2000/12/28 00:19:47
*************** extern void s_lock_sleep(unsigned spin);
*** 79,85 ****
--- 79,159 ----
   * All the gcc inlines
   */
  
+ #if defined(__alpha)
+ /*
+   does this work for all alpha processors?
  
+   digital assembly manual/docs:
+     http://tru64unix.compaq.com/faqs/publications/base_doc/DOCUMENTATION/V40D_HTML/APS31DTE/TITLE.HTM
+ */
+ 
+ #define TAS(lock) tas(lock)
+ #define S_UNLOCK(lock) do { __asm__("mb"); *(lock) = 0; } while (0)
+ 
+ static __inline__ int
+ tas(volatile slock_t *lock)
+ {
+    slock_t  _res;
+    slock_t  temp;
+ 
+    __asm__
+    __volatile__
+    (
+    "1: ldq_l %0, %1       \n"
+    "   and   %0, 1, %2    \n"
+    "   bne   %2, 3f       \n"
+    "   xor   %0, 1, %0    \n"
+    "   stq_c %0, %1       \n"
+    "   beq   %0, 2f       \n"
+    "   mb                 \n"
+    "   br    3f           \n"
+    "2: br    1b           \n"
+    "3: cmpeq %2, 0, %2    \n"
+    "   xor   %2, 1, %2    \n"
+      : "=&r" (temp),
+        "=m"  (*lock),
+        "=&r" (_res)
+      : "m"   (*lock)
+    );
+    return (int) _res;
+ }
+ 
+ /*
+   below is the old assembly for tas, in addition to it having GNU C asm syntax
+   while being exposed to non-gnu compilers, it looks to me like it tests the 
+   value at lock prior to ensuring it is actually locked -- bne $0, 3f. I could
+   be misunderstanding this, since I am not a real programmer, tho.
+ */
+ /*
+ static __inline__ int
+ tas(volatile slock_t *lock)
+ {
+     register slock_t _res;
+ 
+     asm("ldq   $0, %0           \n\
+          bne   $0, 3f           \n\
+          ldq_l $0, %0           \n\
+          bne   $0, 3f           \n\
+          or    $31, 1, $0       \n\
+          stq_c $0, %0           \n\
+          beq   $0, 2f           \n\
+          bis   $31, $31, %1     \n\
+          mb                     \n\
+          jmp   $31, 4f          \n\
+         2: or    $31, 1, $0     \n\
+         3: bis   $0, $0, %1     \n\
+         4: nop                  \n"
+       : "=m"(*lock), "=r"(_res)
+       : 
+       : "0"
+     );
+ 
+     return (int) _res;
+ }
+ */
+ 
+ #endif /* __alpha */
+ 
  #if defined(__i386__)
  #define TAS(lock) tas(lock)
  
*************** tas(volatile slock_t *lock)
*** 232,239 ****
  
  #endif  /* NEED_NS32K_TAS_ASM */
  
- 
- 
  #else							/* __GNUC__ */
  /***************************************************************************
   * All non gcc
--- 306,311 ----
*************** tas(volatile slock_t *s_lock)
*** 275,338 ****
  
  #endif	 /* NEED_I386_TAS_ASM */
  
- #endif	 /* defined(__GNUC__) */
- 
- 
- 
- /*************************************************************************
-  * These are the platforms that have common code for gcc and non-gcc
-  */
  
- 
  #if defined(__alpha)
  
! #if defined(__osf__)
! /*
!  * OSF/1 (Alpha AXP)
!  *
!  * Note that slock_t on the Alpha AXP is msemaphore instead of char
!  * (see storage/ipc.h).
!  */
  #include <alpha/builtins.h>
- #if 0
- #define TAS(lock)	  (msem_lock((lock), MSEM_IF_NOWAIT) < 0)
- #define S_UNLOCK(lock) msem_unlock((lock), 0)
- #define S_INIT_LOCK(lock)		msem_init((lock), MSEM_UNLOCKED)
- #define S_LOCK_FREE(lock)	  (!(lock)->msem_state)
- #else
- #define TAS(lock)         (__INTERLOCKED_TESTBITSS_QUAD((lock),0))
- #endif
  
! #else /* i.e. not __osf__ */
  
! #define TAS(lock) tas(lock)
! #define S_UNLOCK(lock) do { __asm__("mb"); *(lock) = 0; } while (0)
! 
! static __inline__ int
! tas(volatile slock_t *lock)
! {
!  register slock_t _res;
  
! __asm__("	 ldq   $0, %0			   \n\
! 				 bne   $0, 3f		   \n\
! 				 ldq_l $0, %0			 \n\
! 				 bne   $0, 3f		   \n\
! 				 or    $31, 1, $0		   \n\
! 				 stq_c $0, %0				   \n\
! 				 beq   $0, 2f			   \n\
! 				 bis   $31, $31, %1 	   \n\
! 				 mb 							   \n\
! 				 jmp   $31, 4f			   \n\
! 			  2: or    $31, 1, $0			   \n\
! 			  3: bis   $0, $0, %1		   \n\
! 			  4: nop	  ": "=m"(*lock), "=r"(_res): :"0");
  
! 	return (int) _res;
! }
! #endif /* __osf__ */
  
  #endif /* __alpha */
  
  
  #if defined(__hpux)
  /*
--- 347,376 ----
  
  #endif	 /* NEED_I386_TAS_ASM */
  
  
  #if defined(__alpha)
  
! #if defined(__DECC) || defined(__DECCXX)
! 
! #include <c_asm.h>
  #include <alpha/builtins.h>
  
! #define TAS(lock)         __INTERLOCKED_TESTBITSS_QUAD((lock),0)
! #define S_UNLOCK(lock) do { asm("mb"); *(lock) = 0; } while (0)
  
! #elif defined (__SOME_OTHER_C_COMPILER
  
! /* __asm__(...) for __SOME_OTHER_C_COMPILER */
  
! #endif /* !(__DECC || __DECCXX) */
  
  #endif /* __alpha */
  
+ #endif	 /* defined(__GNUC__) */
+ 
+ /*************************************************************************
+  * These are the platforms that have common code for gcc and non-gcc
+  */
  
  #if defined(__hpux)
  /*