From a3876636373c64e4192e2fa571523da6431004c4 Mon Sep 17 00:00:00 2001 From: Andres Freund Date: Mon, 26 Sep 2022 14:05:10 -0700 Subject: [PATCH v17 08/23] autoconf: Unify CFLAGS_SSE42 and CFLAGS_ARMV8_CRC32C There's no need for two different set of flags, as we'll only ever run on a one architecture at a time... Simplifies meson PGXS compatibility. --- src/port/Makefile | 16 ++++++++-------- config/c-compiler.m4 | 8 ++++---- configure | 19 +++++++++---------- configure.ac | 10 +++++----- src/Makefile.global.in | 3 +-- 5 files changed, 27 insertions(+), 29 deletions(-) diff --git a/src/port/Makefile b/src/port/Makefile index b3754d8940a..711f59e32bd 100644 --- a/src/port/Makefile +++ b/src/port/Makefile @@ -88,15 +88,15 @@ libpgport.a: $(OBJS) thread.o: CFLAGS+=$(PTHREAD_CFLAGS) thread_shlib.o: CFLAGS+=$(PTHREAD_CFLAGS) -# all versions of pg_crc32c_sse42.o need CFLAGS_SSE42 -pg_crc32c_sse42.o: CFLAGS+=$(CFLAGS_SSE42) -pg_crc32c_sse42_shlib.o: CFLAGS+=$(CFLAGS_SSE42) -pg_crc32c_sse42_srv.o: CFLAGS+=$(CFLAGS_SSE42) +# all versions of pg_crc32c_sse42.o need CFLAGS_CRC +pg_crc32c_sse42.o: CFLAGS+=$(CFLAGS_CRC) +pg_crc32c_sse42_shlib.o: CFLAGS+=$(CFLAGS_CRC) +pg_crc32c_sse42_srv.o: CFLAGS+=$(CFLAGS_CRC) -# all versions of pg_crc32c_armv8.o need CFLAGS_ARMV8_CRC32C -pg_crc32c_armv8.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C) -pg_crc32c_armv8_shlib.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C) -pg_crc32c_armv8_srv.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C) +# all versions of pg_crc32c_armv8.o need CFLAGS_CRC +pg_crc32c_armv8.o: CFLAGS+=$(CFLAGS_CRC) +pg_crc32c_armv8_shlib.o: CFLAGS+=$(CFLAGS_CRC) +pg_crc32c_armv8_srv.o: CFLAGS+=$(CFLAGS_CRC) # # Shared library versions of object files diff --git a/config/c-compiler.m4 b/config/c-compiler.m4 index 000b075312e..eb8cc8ce170 100644 --- a/config/c-compiler.m4 +++ b/config/c-compiler.m4 @@ -597,7 +597,7 @@ fi])# PGAC_HAVE_GCC__ATOMIC_INT64_CAS # the other ones are, on x86-64 platforms) # # An optional compiler flag can be passed as argument (e.g. -msse4.2). If the -# intrinsics are supported, sets pgac_sse42_crc32_intrinsics, and CFLAGS_SSE42. +# intrinsics are supported, sets pgac_sse42_crc32_intrinsics, and CFLAGS_CRC. AC_DEFUN([PGAC_SSE42_CRC32_INTRINSICS], [define([Ac_cachevar], [AS_TR_SH([pgac_cv_sse42_crc32_intrinsics_$1])])dnl AC_CACHE_CHECK([for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=$1], [Ac_cachevar], @@ -613,7 +613,7 @@ AC_LINK_IFELSE([AC_LANG_PROGRAM([#include ], [Ac_cachevar=no]) CFLAGS="$pgac_save_CFLAGS"]) if test x"$Ac_cachevar" = x"yes"; then - CFLAGS_SSE42="$1" + CFLAGS_CRC="$1" pgac_sse42_crc32_intrinsics=yes fi undefine([Ac_cachevar])dnl @@ -629,7 +629,7 @@ undefine([Ac_cachevar])dnl # # An optional compiler flag can be passed as argument (e.g. # -march=armv8-a+crc). If the intrinsics are supported, sets -# pgac_armv8_crc32c_intrinsics, and CFLAGS_ARMV8_CRC32C. +# pgac_armv8_crc32c_intrinsics, and CFLAGS_CRC. AC_DEFUN([PGAC_ARMV8_CRC32C_INTRINSICS], [define([Ac_cachevar], [AS_TR_SH([pgac_cv_armv8_crc32c_intrinsics_$1])])dnl AC_CACHE_CHECK([for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=$1], [Ac_cachevar], @@ -647,7 +647,7 @@ AC_LINK_IFELSE([AC_LANG_PROGRAM([#include ], [Ac_cachevar=no]) CFLAGS="$pgac_save_CFLAGS"]) if test x"$Ac_cachevar" = x"yes"; then - CFLAGS_ARMV8_CRC32C="$1" + CFLAGS_CRC="$1" pgac_armv8_crc32c_intrinsics=yes fi undefine([Ac_cachevar])dnl diff --git a/configure b/configure index 1caca21b625..80b28cb9310 100755 --- a/configure +++ b/configure @@ -645,8 +645,7 @@ MSGMERGE MSGFMT_FLAGS MSGFMT PG_CRC32C_OBJS -CFLAGS_ARMV8_CRC32C -CFLAGS_SSE42 +CFLAGS_CRC LIBOBJS ZSTD LZ4 @@ -17815,7 +17814,7 @@ fi # # First check if the _mm_crc32_u8 and _mm_crc32_u64 intrinsics can be used # with the default compiler flags. If not, check if adding the -msse4.2 -# flag helps. CFLAGS_SSE42 is set to -msse4.2 if that's required. +# flag helps. CFLAGS_CRC is set to -msse4.2 if that's required. { $as_echo "$as_me:${as_lineno-$LINENO}: checking for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=" >&5 $as_echo_n "checking for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=... " >&6; } if ${pgac_cv_sse42_crc32_intrinsics_+:} false; then : @@ -17850,7 +17849,7 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_sse42_crc32_intrinsics_" >&5 $as_echo "$pgac_cv_sse42_crc32_intrinsics_" >&6; } if test x"$pgac_cv_sse42_crc32_intrinsics_" = x"yes"; then - CFLAGS_SSE42="" + CFLAGS_CRC="" pgac_sse42_crc32_intrinsics=yes fi @@ -17889,13 +17888,12 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_sse42_crc32_intrinsics__msse4_2" >&5 $as_echo "$pgac_cv_sse42_crc32_intrinsics__msse4_2" >&6; } if test x"$pgac_cv_sse42_crc32_intrinsics__msse4_2" = x"yes"; then - CFLAGS_SSE42="-msse4.2" + CFLAGS_CRC="-msse4.2" pgac_sse42_crc32_intrinsics=yes fi fi - # Are we targeting a processor that supports SSE 4.2? gcc, clang and icc all # define __SSE4_2__ in that case. cat confdefs.h - <<_ACEOF >conftest.$ac_ext @@ -17922,7 +17920,7 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext # # First check if __crc32c* intrinsics can be used with the default compiler # flags. If not, check if adding -march=armv8-a+crc flag helps. -# CFLAGS_ARMV8_CRC32C is set if the extra flag is required. +# CFLAGS_CRC is set if the extra flag is required. { $as_echo "$as_me:${as_lineno-$LINENO}: checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=" >&5 $as_echo_n "checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=... " >&6; } if ${pgac_cv_armv8_crc32c_intrinsics_+:} false; then : @@ -17959,7 +17957,7 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics_" >&5 $as_echo "$pgac_cv_armv8_crc32c_intrinsics_" >&6; } if test x"$pgac_cv_armv8_crc32c_intrinsics_" = x"yes"; then - CFLAGS_ARMV8_CRC32C="" + CFLAGS_CRC="" pgac_armv8_crc32c_intrinsics=yes fi @@ -18000,13 +17998,14 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&5 $as_echo "$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&6; } if test x"$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" = x"yes"; then - CFLAGS_ARMV8_CRC32C="-march=armv8-a+crc" + CFLAGS_CRC="-march=armv8-a+crc" pgac_armv8_crc32c_intrinsics=yes fi fi + # Select CRC-32C implementation. # # If we are targeting a processor that has Intel SSE 4.2 instructions, we can @@ -18034,7 +18033,7 @@ if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1 else # Use ARM CRC Extension if available. - if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then + if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_CRC" = x""; then USE_ARMV8_CRC32C=1 else # ARM CRC Extension, with runtime check? diff --git a/configure.ac b/configure.ac index 10fa55dd154..f837a602d01 100644 --- a/configure.ac +++ b/configure.ac @@ -2086,12 +2086,11 @@ fi # # First check if the _mm_crc32_u8 and _mm_crc32_u64 intrinsics can be used # with the default compiler flags. If not, check if adding the -msse4.2 -# flag helps. CFLAGS_SSE42 is set to -msse4.2 if that's required. +# flag helps. CFLAGS_CRC is set to -msse4.2 if that's required. PGAC_SSE42_CRC32_INTRINSICS([]) if test x"$pgac_sse42_crc32_intrinsics" != x"yes"; then PGAC_SSE42_CRC32_INTRINSICS([-msse4.2]) fi -AC_SUBST(CFLAGS_SSE42) # Are we targeting a processor that supports SSE 4.2? gcc, clang and icc all # define __SSE4_2__ in that case. @@ -2105,12 +2104,13 @@ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [ # # First check if __crc32c* intrinsics can be used with the default compiler # flags. If not, check if adding -march=armv8-a+crc flag helps. -# CFLAGS_ARMV8_CRC32C is set if the extra flag is required. +# CFLAGS_CRC is set if the extra flag is required. PGAC_ARMV8_CRC32C_INTRINSICS([]) if test x"$pgac_armv8_crc32c_intrinsics" != x"yes"; then PGAC_ARMV8_CRC32C_INTRINSICS([-march=armv8-a+crc]) fi -AC_SUBST(CFLAGS_ARMV8_CRC32C) + +AC_SUBST(CFLAGS_CRC) # Select CRC-32C implementation. # @@ -2139,7 +2139,7 @@ if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1 else # Use ARM CRC Extension if available. - if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then + if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_CRC" = x""; then USE_ARMV8_CRC32C=1 else # ARM CRC Extension, with runtime check? diff --git a/src/Makefile.global.in b/src/Makefile.global.in index d8ea2da583c..c87b6d97ca9 100644 --- a/src/Makefile.global.in +++ b/src/Makefile.global.in @@ -262,8 +262,7 @@ CFLAGS_SL_MODULE = @CFLAGS_SL_MODULE@ CXXFLAGS_SL_MODULE = @CXXFLAGS_SL_MODULE@ CFLAGS_UNROLL_LOOPS = @CFLAGS_UNROLL_LOOPS@ CFLAGS_VECTORIZE = @CFLAGS_VECTORIZE@ -CFLAGS_SSE42 = @CFLAGS_SSE42@ -CFLAGS_ARMV8_CRC32C = @CFLAGS_ARMV8_CRC32C@ +CFLAGS_CRC = @CFLAGS_CRC@ PERMIT_DECLARATION_AFTER_STATEMENT = @PERMIT_DECLARATION_AFTER_STATEMENT@ CXXFLAGS = @CXXFLAGS@ -- 2.37.3.542.gdd3f6c4cae