master ----------------------------------------------------------------------------------------------- 35,765,095,847 L1-dcache-loads (60.73%) 1,761,627,379 L1-dcache-load-misses # 4.93% of all L1-dcache hits (68.62%) 23,707,144,426 L1-dcache-stores (76.40%) 36,049,977,992 dTLB-loads (76.53%) 119,985,744 dTLB-load-misses # 0.33% of all dTLB cache hits (76.46%) dTLB-prefetch-misses 862,291,225 LLC-loads (61.60%) LLC-load-misses 214,187,538 LLC-stores (62.01%) 324,390,385 LLC-prefetches (15.59%) 124,688,872,086 cycles (23.38%) 125,720,003,254 instructions # 1.01 insn per cycle # 0.00 stalled cycles per insn (31.02%) 3,027,178,206 cache-references (38.40%) 53,245 cache-misses # 0.002 % of all cache refs (45.68%) 3,391,913,360 bus-cycles (53.26%) 6,928,207 raw_syscalls:sys_enter 51.003463352 seconds time elapsed patched ----------------------------------------------------------------------------------------------- 36,275,366,749 L1-dcache-loads (59.90%) 1,810,707,151 L1-dcache-load-misses # 4.99% of all L1-dcache hits (68.00%) 23,947,408,537 L1-dcache-stores (76.04%) 36,554,434,020 dTLB-loads (77.09%) 126,857,791 dTLB-load-misses # 0.35% of all dTLB cache hits (77.99%) dTLB-prefetch-misses 881,835,712 LLC-loads (63.52%) LLC-load-misses 223,210,875 LLC-stores (62.54%) 334,866,329 LLC-prefetches (14.01%) 128,919,071,020 cycles (21.24%) 127,628,370,525 instructions # 0.99 insn per cycle # 0.00 stalled cycles per insn (28.83%) 3,106,611,147 cache-references (36.48%) 37,956 cache-misses # 0.001 % of all cache refs (44.27%) 3,508,937,982 bus-cycles (52.09%) 6,839,416 raw_syscalls:sys_enter 52.003477010 seconds time elapsed